A PRBS may be utilized to check for data integrity in a wide variety of applications, including telecommunication system testing and integrated circuit design and verification. For example, in a telecommunication system application, a PRBS may be generated and transmitted from a transmitter to a receiver of the system. The receiver recovers the PRBS and applies it to a PRBS checker, which determines if there are any errors in the received PRBS. The PRBS generator and the PRBS checker are both typically implemented using a circuitry arrangement known as a linear feedback shift register (LFSR). The LFSR in the PRBS checker is configured to passively monitor the received PRBS and to report error events when it observes particular changes in its internal state.
A number of significant problems can arise when using conventional PRBS checkers. For example, important error events may be inadvertently missed under some circumstances in a conventional PRBS checker. One such circumstance involves loss of clock to the PRBS checker. A clock signal is usually recovered from received PRBS data or otherwise supplied externally to the PRBS checker. If the clock signal is lost at a time when the PRBS checker is reporting an error-free condition, the PRBS checker may remain stuck in that mode, thereby potentially missing subsequent errors in the received PRBS.
Another potential problem relates to the complexity of the interface between the PRBS checker and external circuitry. As the number and type of events to be reported by the PRBS checker increase, the complexity of the interface increases, which can negatively impact circuit size and cost. The complexity of the interface can also lead to inefficiency in the reporting and processing of events. For example, during an initialization process or other situation in which the input data to the PRBS checker may be unstable, events may be reported at an excessive rate, which can negatively impact performance.
Accordingly, a need exists for an improved PRBS checking arrangement which can avoid missed errors such as those associated with loss of clock, without substantially increasing the complexity of the interface between the PRBS checker and external circuitry.